Fri Dec 03 09:39:59 2010 TEST_HSK: Starting script TEST_HSK.py Fri Dec 03 09:39:59 2010 efw: Chaging test name to: HSK_Module_ Fri Dec 03 09:39:59 2010 efw: Flushing PTP data to disk Fri Dec 03 09:39:59 2010 efw: Syncing data with rsync (if enabled) Fri Dec 03 09:39:59 2010 efw: Set new output location to 20101203_093959_UUT2_HSK_Module_ Fri Dec 03 09:39:59 2010 TEST_HSK: ======================================== Fri Dec 03 09:39:59 2010 TEST_HSK: ******* EXEC MODULE TEST ********* Fri Dec 03 09:39:59 2010 TEST_HSK: ======================================== Fri Dec 03 09:39:59 2010 efw_cmd_log: EFW_ADRH(221) Fri Dec 03 09:39:59 2010 efw_cmd_log: EFW_ADRL(255) Fri Dec 03 09:39:59 2010 efw_cmd_log: EFW_LOAD(0) Fri Dec 03 09:40:10 2010 efw_cmd_log: EFW_RESET() Fri Dec 03 09:40:14 2010 efw_error_monitor: SCE_IN_ERRORS.TimePulseTlmUnderrunErrCnt 2 Fri Dec 03 09:40:16 2010 efw_log: 0x0000 1969-12-31 16:00:00 0xc2 0x000001 CMDITFERR ITF Header Error at Address in SRAM Fri Dec 03 09:40:23 2010 efw_cmd_log: EFW_ADRH(221) Fri Dec 03 09:40:23 2010 efw_cmd_log: EFW_ADRL(255) Fri Dec 03 09:40:23 2010 efw_cmd_log: EFW_LOAD(0) Fri Dec 03 09:40:23 2010 efw_cmd_log: EFW_CLEAR() Fri Dec 03 09:40:31 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:31 2010 TEST_HSK: ******* FSW VERSION 3.00 ********* Fri Dec 03 09:40:31 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:31 2010 TEST_HSK: ---------------------------------------- Fri Dec 03 09:40:31 2010 TEST_HSK: Starting script TEST_HSK_2.py Fri Dec 03 09:40:31 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:31 2010 TEST_HSK: HSK_2: ENGINEERING A/D SAMPLING Fri Dec 03 09:40:31 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:31 2010 TEST_HSK: 1. Initialization Fri Dec 03 09:40:31 2010 efw_cmd_log: EFW_CLEAR() Fri Dec 03 09:40:31 2010 TEST_HSK: 2.1 Verifying Critical A/D Samples (AP262) Fri Dec 03 09:40:31 2010 TEST_HSK: TFPGA [30-50] = 36 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P33VD [60-80] = 70 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P33IMON [10-20] = 12 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P15VD [40-60] = 4c : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P15IMON [00-20] = 09 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: 3.1 Verifying General A/D Samples (AP264) Fri Dec 03 09:40:31 2010 TEST_HSK: IMON_IDPU [80-9f] = 2a : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: IMON_BEB [80-9f] = 42 : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: TMON_LVPS [80-9f] = 7f : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: IMON_FVX [80-9f] = 80 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: IMON_FVY [80-9f] = ff : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: IMON_FVZ [80-9f] = 2c : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_BEB_P10VA [80-9f] = 6c : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_BEB_N10VA [80-9f] = 93 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_BEB_P5VA [80-9f] = 66 : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_BEB_P5VD [80-9f] = 5c : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_P10VA [80-9f] = 69 : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_N10VA [80-9f] = 96 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_P5VA [80-9f] = 63 : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_N5VA [80-9f] = 9c : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_P5VD [80-9f] = 65 : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_P36VD [80-9f] = 64 : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: VMON_IDPU_P18VD [80-9f] = 7b : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: TMON_AXB5 [80-9f] = ff : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: TMON_AXB6 [80-9f] = ff : FAIL Fri Dec 03 09:40:31 2010 TEST_HSK: TEMP_FPGA [30-50] = 36 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P33VD [60-80] = 70 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P33IMON [10-20] = 12 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P15VD [40-60] = 4c : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: P15IMON [00-20] = 09 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: DGND [00-20] = 00 : PASS Fri Dec 03 09:40:31 2010 TEST_HSK: HSK_2: A/D SAMPLING TEST : 15 Errors Fri Dec 03 09:40:31 2010 TEST_HSK: ================END==================== Fri Dec 03 09:40:31 2010 TEST_HSK: Script TEST_HSK_2.py completed Fri Dec 03 09:40:31 2010 TEST_HSK: ---------------------------------------- Fri Dec 03 09:40:31 2010 TEST_HSK: Starting script TEST_HSK_3.py Fri Dec 03 09:40:31 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:31 2010 TEST_HSK: HSK_3: Limit BEB sampling to LDAC cmd Fri Dec 03 09:40:31 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:31 2010 TEST_HSK: 1. Initialization Fri Dec 03 09:40:31 2010 efw_cmd_log: EFW_CLEAR() Fri Dec 03 09:40:31 2010 TEST_HSK: 2.1 Verifying that BEB packet rate == 0 Fri Dec 03 09:40:41 2010 TEST_HSK: 2.1 Verified Fri Dec 03 09:40:41 2010 TEST_HSK: 2.2 Requesting a Readback from BEB Fri Dec 03 09:40:41 2010 efw_cmd_log: EFW_LDAC(1) Fri Dec 03 09:40:46 2010 TEST_HSK: 2.2 Received a Readback : PASS Fri Dec 03 09:40:46 2010 TEST_HSK: ================END==================== Fri Dec 03 09:40:46 2010 TEST_HSK: Script TEST_HSK_3.py completed Fri Dec 03 09:40:46 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:46 2010 TEST_HSK: **** HSK Module FAIL 15 Errors **** Fri Dec 03 09:40:46 2010 TEST_HSK: ======================================== Fri Dec 03 09:40:46 2010 TEST_HSK: Script TEST_HSK.py completed Fri Dec 03 09:40:47 2010 efw_scripting: Recorded profile information for script TEST_HSK to file Instruments/EFW/bench-tests\20101203_093959_UUT2_HSK_Module_\TEST_HSK_profile.txt Fri Dec 03 09:40:47 2010 efw_scripting: Recorded trace for script TEST_HSK to file Instruments/EFW/bench-tests\20101203_093959_UUT2_HSK_Module_\TEST_HSK_trace.txt Fri Dec 03 09:44:46 2010 TEST_LD: ---------------------------------------- Fri Dec 03 09:44:46 2010 TEST_LD: Starting script TEST_LD.py Fri Dec 03 09:44:46 2010 efw: Chaging test name to: LD_Module_ Fri Dec 03 09:44:46 2010 efw: Flushing PTP data to disk Fri Dec 03 09:44:46 2010 efw: Syncing data with rsync (if enabled)